Via in pad is the design practice of placing a via in the copper landing pad of a component. Compared to standard PCB via routing, via in pad allows a design to use smaller component pitch sizes and further reduce the PCBs overall size. With component manufactures pushing smaller parts every year and the demand from consumers for smaller devices, the usage of via in pad practices by hardware engineers have become more commonplace.
Via in Pad? What makes them different from Traditional Vias
With traditional vias, the signal is routed away from the pad and then to the via. This allows the application of soldermask to prevent solder paste from wicking into the via during the reflow process. In doing so, this prevents a situation which can cause the pad and component connection to fail due to insufficient solder. With via in pad, the drill hole for the via is inside the pad. This means you can not tent the via with soldermask. Leaving the via open to allow the paste to wick into the barrel will cause reliability problems during manufacturing.
To reduce manufacturing defects and increase yield, it is best to implement via in pad by having your PCB manufacturer cap the via. This is accomplished by first filling the via with a conductive(or non-conductive) epoxy and then plating over with copper. Most contract PCB assembly manufacturers will not allow via in pad without first filling and then plating over the via.
When should I use Via in Pad?
Trying to route and escape component packages with sub 0.5mm pitch with traditional routing methods will cause Design Rule Check errors due to trace width, annular ring, and drill size limitations. Manufacturing limitations on trace size does not allow for smaller and more compact traces to be made with traditional PCB fabrication methods. For these small pitch components, the only effective way to route them is with capped via in pad as this allows the PCB routing to be as compact as possible.
Capped via in pad can simplify routing for complex BGA and LGA packages as well. Instead of the traditional fan out, the signals can go straight into the PCB. Surface routing is minimized which can allow components like bypass capacitors to be placed as close as possible to other components, minimizing parasitic inductance. Also, this enables shorter paths to power and ground planes which will help minimize EMF emissions of high-frequency designs.
Vias in thermal pads can also help with heat management. High power surface mount parts typically have a thermal pad that mounts to the PCB. To dissipate the heat more efficiently, it is wise to drop vias through the PCB to the other side of the PCB to increase the copper area for heat release.
BGA Requirements – With BGAs, footprints with 0.5mm and less require microvias as the pad diameter is not large enough to accommodate mechanical drills. But that means that by using laser microvias the routing must change to allow for their depth limitation. As stated earlier, microvias most commonly span a single dielectric thickness–ideally one half deep as the diameter (0.5:1 aspect ratio) with an a maximum depth equal to the diameter (1:1 aspect ratio). This is due to the fact that the fully copper plating process takes a substantial amount of time and is not designed to fill deep, blind holes that extend down deep into the board. So you must consider dropping the signals down a layer and then fanning out to escape the device perimeter. In general, the outer row of a BGA can directly fan out, and the next internal row should drop down to the next layer so that it may fan out (as the outer row that was on the surface will not exist to impede the fan out. This method also allows a substantial trace width as you do not have to consider squeezing a narrow trace between two close adjacent pads.
Implementing via in pad is very similar to traditional vias. What differs is how it affects the design rule checks for the PCB and how the manufacturing files are created. You will need to make sure your via in pad meets the manufacturer’s minimal annular ring requirement. The pad size of the component’s footprint must be equal to or larger than the minimal annular ring size. This is usually not an issue as most pad sizes are larger than vias but as BGA packages get smaller this will become a design problem to overcome. If the landing pad’s diameter for the BGA is smaller than the combined via and annular ring diameter, then using Solder Mask Defined pads will be your best bet. Consult the part manufacture for more information.
To properly manufacture PCBs that have via in pads, an additional manufacturing file is necessary. Besides the standard excellon drill file that is required, a drill file that just contains the vias that are in component pads and need to be capped and filled is also needed. Using two separate files reduces confusion on which vias need to be capped and reduces manufacturing cost by making sure traditional vias do not get filled and capped. Consult your EDA tool to see if there is an option to do this. If not, modifying your drill file with a gerber viewer might be needed to create this extra file.
Require via in pad to the manufacturer
For the via process, if definite the via process follow as IPC 4761 type VII , this is filling the via with a conductive(or non-conductive) epoxy and then plating over with copper mean,this is contain via in pad. Usually to smooth production, the others small via hole it is also do as via filling and capped(for example, if some 0.2mm via holes are via in pad, but also some 0.2mm are traditional vias, defined as all of the 0.2mm via holes can be filling and capped will be easy to process, or even defined all via holes which size are not bigger than 0.55mm can be filled and capped to prevent missing some via filling and capped).
Exceptions to Always Capping Via in Pads
With most design rules there are exceptions and the “Always cap via in pads” is no exception to that rule! Center pads on QFN packages and thermal center pads for surface mount power parts generally benefit to having open via in pads. Without vias in the center pad of a QFN you can some times get trapped gasses or a lifting motion during reflow. These can cause the component to tilt to one side and lose coplanarity to the PCB. The vias in the center pad allow gasses made from the flux in the solder paste to more easily escape and also allows any excess solder paste that is under the part to be drawn through. With thermal pads this extra solder paste that fills the vias has the benefit of improving the thermal conductivity of the via.
Conclusion
With electronic components ever shrinking smaller, hardware engineers will need to utilize and learn new tools and techniques to implement these components in a reliable and scalable way. Via in pad allows the smallest component fan out possible with current PCB construction techniques. When looking at using via in pad techniques, consider the extra manufacturing cost and time that places on your product’s bill of materials. Make sure to work closely with your contract PCBA manufacturer as they will be able to give suggestions in regards to how via in pad can change the manufacturing process. Most manufacturers will agree that if your hardware design can be implemented without via in pad, then for cost and reliability reasons the design should avoid via in pad.
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